Digital design interview questions

Digital design interview questions

There are no predefined Digital design interview questions as the person can ask anything starting from a simple concept to advance level and it also varies at different experience level.

1] Number System:-

• Conversion of a particular number into its equivalent binary, octal,decimal and Hexadecimal and vice versa.
• Questions could be asked on XS-3 codes,1’s and 2’s complement operation and finding the base of a number and different weighted and non weighted code.

2] Logic Gate:-

• Why Nand and Nor are called as universal gates (or) Derive all other gates using only Nand and Nor.
• A particular expression can be given in either SOP or POS and can ask to optimise the circuit using only Nand or Nor.
• What is the practical application of XOR and XNOR gate?
• A particular circuit could be given and asked to find the output.

3] Combinational Circuits:-

• Implement all the basic gates using 2:1 Mux.
• Implement 4:1 Mux using 2:1 Mux
• Implement Full adder using 4:1 Mux
• A function will be given like f(a,b,c) = sum(m){1,3,5,6} and implement it using 4:1 and 2:1 Mux.
• Implement 2:1 Mux using Tristate buffers.
• Design 4:16 Decoder using 3:8 Decoder.
• Design Full adder using 3:8 Decoder.
• Implement Full adder(FA),HA,FS,HS using either NAND or NOR gates.
• Implement Full adder using Half Adder.
• LAC adder and it's working principle.
• Questions on Implicants,Prime Implicants and Essential Prime Implicants.
• Karnaugh Map and Tabulation Method - Which one to use and when.
• Hazards types and Causes.

4] Sequential Circuits:-

• Conversion of one Flip Flop to another like JK to SR,T to D,etc.
• Race around condition in JK flip flop and how to avoid it.
• Difference between Latch and Flip Flop.
• Different types of shift register and it's working.
• Difference between Johnson and Ring Counter.
• Design a synchronous counter using JK flip flop and count sequence in XS-3 code.
• Implement a counter with Mux
• Design a MOD 10 counter with 50%/33% duty cycle.
• Difference between Mealy and Moore State Machine.
• Sequence detector problems like Design a Mealy/Moore FSM for 1001.
• Design a Mealy FSM for 010 and 1010.
• Frequency Divider Circuits.

5] Advance Digital:-

• Setup and Hold time and what is Metastability and how to avoid it.
• Clock Skew/Slew/Slack/Propagation Delay.
• What are False Path and Multicycle Path.
• Hold Slack Calculation of a given Circuit.
• Frequency calculation of a given Circuit.
• Reset Strategies and what is asynchronous assertion and Synchronous Deassertion.
• Clock domain Crossing and what is asynchronous CDC.
• What are synchonisers and when to use them.
• FIFO depth Calculation of a Asynchronous FIFO.
• What is Empty and Full Condition in FIFO.
• Between Binary and Gray Counter,which one to use and why?

1. Can we use if statement to make a loop inside verilog?
2. Is it possible to design memory using combination circuit? (Answer is Yes. Don’t forget about ROM).
3. What are different forms of representation of Signed numbers?
4. In which type of reset do we get meta-stable state: synchronous or asynchronous?
5. Which universal gate can be used to completely implement the encoder circuit?
6. In a negative edge triggered asynchronous fliflop using Qbar as input to subsequent flip flops, states are counted upwards or downwards?
7. In a pipelined circuit, if the first output appears at 5th clock cycle, then how long ill it take for the circuit to produce third output?

1. Finite state machines mealy and moore machine. Sequence detection like 10100,01011 etc using both mealy and moore machine and their verilog implementation
2. Combinational circuits like carry look ahead adder, Multiplexers, decoder, Priority encoders etc
3. Basic Setup and hold time ( For M.techs they will go in deep into this)
4. Logic implementation using MUX
5. frequency division problems like f/3 with 50% duty cycle
6. edge detection problems for positive and negative edge
7. Synchronous reset and asynchronous reset their advantages Disadvantages. How to model them.
8. Random bits generation using shift registers
9. Counters synchronous and asynchronous
10. Clock domain crossing and Metastability questions ( for M.tech students)
11. Synchronizers and MTBF
12. Asynchronous FIFO (
13. Memories SRAM, DRAM
14. Verilog code for all the combinational and sequential circuit

15. what is 1's complement and 2's complement? where it is used?

16. Implementation of basic gates using MUX (they frequently ask this!!), also they may ask you to implement any function using MUX.(e.g. design D flip flop using MUX)

17. Implementation of basic gates using arithmetic operators

18. how can you implement and/or/not gate using NAND/NOR?

19. what is the difference between flip flop and latches?

20. conversion of flip flops (e.g. convert T flip flop to D flip flop)

21. what is race around condition and how to avoid it?where does it occur?

22. what is master slave configuration? why to use it?

23. what is synchronous and asynchronous counter?

24. design mod x counter (x can be 2, 3, 5 etc.)

25. what is the difference between synchronous reset and asynchronous reset?

26. what is set up time and hold time in digital circuits? conditions for set up time violations and hold time violations?